Conventionally, as shown in FIG. 27, an electronic parts mounting substrate having a mount opening portion 95 at which electronic parts 8 are mounted (Japanese Patent Application Laid-Open No. Hei 7-86752) has been known. For example, a plurality of side-surface patterns 901 are disposed on wall surfaces of the mount opening portion 95. The side-surface patterns 901 are connected to wiring patterns 53 formed inside of the electronic parts mounting substrate 9.
As shown in FIGS. 27 and 28, the electronic parts 8 mounted at the mount opening portion 95 are electrically connected to band-like side-surface pads 903, disposed above the side-surface patterns 901, through bonding wires 80.
Also, wiring patterns 54, each having a bonding pad 540 at an end thereof, are disposed on an upper surface of the electronic parts mounting substrate 9. The wiring patterns 54 are connected to through-holes 99 provided in the periphery of the electronic parts mounting substrate 9. For example, a lead pin 86 is installed inside each of the through-holes 99.
In manufacturing the above electronic parts mounting substrate, four cut holes 90 having side-surface pattern formation portions as wall surfaces are first formed in an insulating substrate 92, which is an upper layer of the electronic parts mounting substrate, as shown in FIG. 28. The cut holes 90 are arranged in such a manner that they surround, in the form of a square, the peripheral edges of a mount opening portion formation portion 999 on the insulating substrate 92.
Subsequently, a metal plating film 902 is coated on each wall surface of the cut holes 90, and the band-like side-surface pads 903, the wiring patterns 54 and the bonding pads 540 are formed on the upper surface of the insulating substrate 92.
Then, cutting is performed between the wall surfaces of the respective cut holes 90 along dotted lines 900 shown in FIG. 28 by router machining to form the mount opening portion 95, and the plurality of side-surface patterns 901 are formed on the wall surfaces of the mount opening portion 95.
Subsequently, another insulating substrate 91 is laminated and crimped on the bottom surface of the above mentioned insulating substrate 92 to obtain a multi-layer plate 98. The through-holes 99 are formed in the peripheral edge of the multi-layer plate 98, and their interiors are coated with the metal plating film 909. Thereafter, a lead pin 86 is installed inside of each of the through-holes 99. Accordingly, the electronic parts mounting substrate 9 shown in FIG. 27 is obtained.
However, in the above-mentioned conventional electronic parts mounting substrate, there is a risk that the metal plating film 902 at the ends of each of the side-surface patterns 901 will peel off from the wall surface 919 of the mount opening portion 95, as shown in FIG. 29.
In other words, during router machining, the metal plating film 902 at each of the ends of the above side-surface patterns 901 covering on the wall surfaces 919 of the mount opening portion will be drawn and peeled off from the wall surfaces by the blade of the router machining tool. After the metal plating film 902 has been drawn and peeled off from the wall surfaces, the metal plating film 902 will further peel off from the portions of the wall surfaces from which the metal plating film 902 has already peeled off when there is a thermal shock, resulting in a risk that reliable electric conductivity of the side-surface patterns will be interrupted. Consequently, the router machining must be conducted gradually with high accuracy, and since the router machining rate cannot be increased, productivity is lowered.
Also, with the trend toward multiplying the functions of electronic parts in recent years, it has been required that side-surface patterns with various potentials be provided on the electronic parts mounting substrate 9. Therefore, as shown in FIG. 30, it has been proposed that each of the wall surfaces of the mount opening portion 95 be punched at a predetermined portion to form a punched portion 912, and the side-surface pattern 901 be formed between the respective punched portions 912. With this process, side-surface patterns 901 having various potentials such as a power supply circuit P, a grounding circuit G or a signal circuit S can be formed. The side-surface patterns 901 can function as the power supply circuit P, the grounding circuit G or the signal circuit S. However, in this case as well, the end portion 902 of the side-surface pattern 901 may peel off when the mount opening portion 95 is punched.
The present invention has been made in view of the above problems with the prior art, and therefore an object of the present invention is to provide an electronic parts mounting substrate and a method of manufacturing the substrate, which are capable of preventing the side-surface pattern from peeling-off and facilitate the formation of the side-surface patterns having a plurality of potentials.